334 search results - page 37 / 67 » A Case for Deconstructing Hardware Transactional Memory Syst... |
ISCA
2010
IEEE
13 years 10 months ago
2010
IEEE
Two broad classes of memory models are available today: models with hardware cache coherence, used in conventional chip multiprocessors, and models that rely upon software to mana...
VLDB
1993
ACM
14 years 21 days ago
1993
ACM
Recovery activities, like logging, checkpointing and restart, are used to restore a database to a consistent state after a system crash has occurred. Recovery related overhead is ...
ISLPED
2000
ACM
14 years 1 months ago
2000
ACM
Memory-processor integration o ers new opportunities for reducing the energy of a system. In the case of embedded systems, one solution consists of mapping the most frequently acc...
CODES
2006
IEEE
14 years 2 months ago
2006
IEEE
This paper presents a methodology to combine Transaction Level Modeling and System/Network co-simulation for the design of networked embedded systems. As a result, a new design di...
ARC
2011
Springer
13 years 3 months ago
2011
Springer
Abstract. In this paper, we take a MIPS-based open-source uniprocessor soft core, Plasma, and extend it to obtain the Beefarm infrastructure for FPGA-based multiprocessor emulation...