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» A Case-Based Parallel Programming System
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ASPLOS
2000
ACM
14 years 3 days ago
Evaluating Design Alternatives for Reliable Communication on High-Speed Networks
We systematically evaluate the performance of five implementations of a single, user-level communication interface. Each implementation makes different architectural assumptions ...
Raoul Bhoedjang, Kees Verstoep, Tim Rühl, Hen...
DSD
2010
IEEE
161views Hardware» more  DSD 2010»
13 years 8 months ago
Design of Trace-Based Split Array Caches for Embedded Applications
—Since many embedded systems execute a predefined set of programs, tuning system components to application programs and data is the approach chosen by many design techniques to o...
Alice M. Tokarnia, Marina Tachibana
IWOMP
2007
Springer
14 years 1 months ago
Supporting OpenMP on Cell
The Cell processor is a heterogeneous multi-core processor with one Power Processing Engine (PPE) core and eight Synergistic Processing Engine (SPE) cores. Each SPE has a directly...
Kevin O'Brien, Kathryn M. O'Brien, Zehra Sura, Ton...
CASES
2007
ACM
13 years 11 months ago
Hierarchical coarse-grained stream compilation for software defined radio
Software Defined Radio (SDR) is an emerging embedded domain where the physical layer of wireless protocols is implemented in software rather than the traditional application speci...
Yuan Lin, Manjunath Kudlur, Scott A. Mahlke, Trevo...
DSL
1997
13 years 9 months ago
Experience with a Language for Writing Coherence Protocols
In this paper we describe our experience with Teapot [7], a domain-specific language for writing cache coherence protocols. Cache coherence is of concern when parallel and distrib...
Satish Chandra, James R. Larus, Michael Dahlin, Br...