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» A Causal Logic of Logic Programming
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DFT
2003
IEEE
113views VLSI» more  DFT 2003»
14 years 29 days ago
Buffer and Controller Minimisation for Time-Constrained Testing of System-On-Chip
Test scheduling and Test Access Mechanism (TAM) design are two important tasks in the development of a System-on-Chip (SOC) test solution. Previous test scheduling techniques assu...
Anders Larsson, Erik Larsson, Petru Eles, Zebo Pen...
IRI
2003
IEEE
14 years 28 days ago
A Formal Framework for Design Component Contracts
– Building large software systems out of existing software components can save time and cost. These software components range from architectural and design components to binary c...
Jing Dong, Paulo S. C. Alencar, Donald D. Cowan
IV
2003
IEEE
98views Visualization» more  IV 2003»
14 years 28 days ago
A new approach to virtual design for spatial configuration problems
In this paper, we present a new framework for the use of Virtual Reality (VR) in engineering design for configuration applications. Traditional VR systems support the visual explo...
Carlos Calderon, Marc Cavazza, Daniel Diaz
LICS
2003
IEEE
14 years 28 days ago
Model checking for probability and time: from theory to practice
Probability features increasingly often in software and hardware systems: it is used in distributed co-ordination and routing problems, to model fault-tolerance and performance, a...
Marta Z. Kwiatkowska
RSP
2003
IEEE
169views Control Systems» more  RSP 2003»
14 years 28 days ago
Rapid Prototyping and Incremental Evolution Using SLAM
The paper shows the outlines of the SLAM system and how its design is suitable for automating rapid prototyping. The system includes a very expressive object oriented specificati...
Ángel Herranz-Nieva, Juan José Moren...