262 search results - page 23 / 53 » A Clustered Approach to Multithreaded Processors |
APCSAC
2006
IEEE
14 years 2 months ago
2006
IEEE
The systolic array paradigm has low communication demand because it does not use costly global communication and each processor communicates with few other processors. It is thus s...
SC
2009
ACM
14 years 3 months ago
2009
ACM
Existing cache partitioning schemes are designed in a manner oblivious to the implicit processor partitioning enforced by the operating system. This paper examines an operating sy...
ISSS
1996
IEEE
14 years 26 days ago
1996
IEEE
Code generation for embedded processors creates opportunities for several performance optimizations not applicable for traditional compilers. We present techniques for improving d...
HPDC
1997
IEEE
14 years 28 days ago
1997
IEEE
This paper presents a novel networking architecture designed for communication intensive parallel applications running on clusters of workstations (COWs) connected by highspeed ne...
IPPS
1997
IEEE
14 years 28 days ago
1997
IEEE
This paper analyses alternatives for the parallelization of the Simulated Annealing algorithm when applied to the placement of modules in a VLSI circuit considering the use of PVM...