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DAC
2010
ACM
13 years 11 months ago
Off-chip memory bandwidth minimization through cache partitioning for multi-core platforms
We present a methodology for off-chip memory bandwidth minimization through application-driven L2 cache partitioning in multicore systems. A major challenge with multi-core system...
Chenjie Yu, Peter Petrov
TCAD
2008
114views more  TCAD 2008»
13 years 7 months ago
Three-Dimensional Chip-Multiprocessor Run-Time Thermal Management
Three-dimensional integration has the potential to improve the communication latency and integration density of chip-level multiprocessors (CMPs). However, the stacked highpower de...
Changyun Zhu, Zhenyu (Peter) Gu, Li Shang, Robert ...
ICPP
2008
IEEE
14 years 1 months ago
Parallel Inferencing for OWL Knowledge Bases
Abstract— We examine the problem of parallelizing the inferencing process for OWL knowledge-bases. A key challenge in this problem is partitioning the computational workload of t...
Ramakrishna Soma, Viktor K. Prasanna
IPPS
2005
IEEE
14 years 1 months ago
Reducing Power with Performance Constraints for Parallel Sparse Applications
Sparse and irregular computations constitute a large fraction of applications in the data-intensive scientific domain. While every effort is made to balance the computational wor...
Guangyu Chen, Konrad Malkowski, Mahmut T. Kandemir...
JDWM
2006
178views more  JDWM 2006»
13 years 7 months ago
Improved Data Partitioning for Building Large ROLAP Data Cubes in Parallel
The pre-computation of data cubes is critical to improving the response time of On-Line Analytical Processing (OLAP) systems and can be instrumental in accelerating data mining ta...
Ying Chen, Frank K. H. A. Dehne, Todd Eavis, Andre...