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» A Combined Virtual Shared Memory and Network which Schedules
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ISCA
2011
IEEE
324views Hardware» more  ISCA 2011»
12 years 11 months ago
Prefetch-aware shared resource management for multi-core systems
Chip multiprocessors (CMPs) share a large portion of the memory subsystem among multiple cores. Recent proposals have addressed high-performance and fair management of these share...
Eiman Ebrahimi, Chang Joo Lee, Onur Mutlu, Yale N....
NOSSDAV
2005
Springer
14 years 1 months ago
Multi-context voice communication in a SIP/SIMPLE-based shared virtual sound room with early reflections
An improved prototype of the “voiscape” voice communication medium has been developed and subjectively evaluated. Voiscape enables natural and seamless voice communication by ...
Yasusi Kanada
ICPADS
2010
IEEE
13 years 5 months ago
Data-Aware Task Scheduling on Multi-accelerator Based Platforms
To fully tap into the potential of heterogeneous machines composed of multicore processors and multiple accelerators, simple offloading approaches in which the main trunk of the ap...
Cédric Augonnet, Jérôme Clet-O...
WWW
2008
ACM
14 years 8 months ago
Understanding internet video sharing site workload: a view from data center design
In this paper we measured and analyzed the workload on Yahoo! Video, the 2nd largest U.S. video sharing site, to understand its nature and the impact on online video data center d...
Xiaozhu Kang, Hui Zhang 0002, Guofei Jiang, Haifen...
HICSS
1997
IEEE
120views Biometrics» more  HICSS 1997»
13 years 12 months ago
Building the 4 Processor SB-PRAM Prototype
The SB-PRAM is a massively parallel, uniform memory access (UMA) shared memory computer. The main ideas of the design are multithreading on instruction level, hashing of the addre...
Peter Bach, Michael Braun, Arno Formella, Jör...