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» A Comparison of Modular Verification Techniques
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VLSID
2001
IEEE
129views VLSI» more  VLSID 2001»
14 years 11 months ago
Design Of Provably Correct Storage Arrays
In this paper we describe a hardware design method for memory and register arrays that allows the application of formal equivalence checking for comparing a high-level register tr...
Rajiv V. Joshi, Wei Hwang, Andreas Kuehlmann
FC
2010
Springer
169views Cryptology» more  FC 2010»
14 years 2 months ago
A Formal Approach for Automated Reasoning about Off-Line and Undetectable On-Line Guessing
Abstract. Starting from algebraic properties that enable guessing lowentropy secrets, we formalize guessing rules for symbolic verification. The rules are suited for both off-line ...
Bogdan Groza, Marius Minea
CAISE
2008
Springer
14 years 26 days ago
Concern-Sensitive Navigation: Improving Navigation in Web Software through Separation of Concerns
Abstract. Traditionally, the use of good techniques to improve software modularity, such as advanced separation of concerns, has no impact in the user experience, for example while...
Jocelyne Nanard, Gustavo Rossi, Marc Nanard, Silvi...
ICMS
2010
13 years 9 months ago
The Design of Core 2: A Library for Exact Numeric Computation in Geometry and Algebra
There is a growing interest in numeric-algebraic techniques in the computer algebra community as such techniques can speed up many applications. This paper is concerned with one su...
Jihun Yu, Chee Yap, Zilin Du, Sylvain Pion, Herv&e...
ICCAD
2002
IEEE
227views Hardware» more  ICCAD 2002»
14 years 7 months ago
Generic ILP versus specialized 0-1 ILP: an update
Optimized solvers for the Boolean Satisfiability (SAT) problem have many applications in areas such as hardware and software verification, FPGA routing, planning, etc. Further use...
Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Kare...