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» A Comparison of Two Architectural Power Models
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ALT
2004
Springer
14 years 6 months ago
Comparison of Query Learning and Gold-Style Learning in Dependence of the Hypothesis Space
Different formal learning models address different aspects of learning. Below we compare learning via queries—interpreting learning as a one-shot process in which the learner i...
Steffen Lange, Sandra Zilles
VLSID
2005
IEEE
82views VLSI» more  VLSID 2005»
14 years 10 months ago
Dual-Edge Triggered Static Pulsed Flip-Flops
Two Simple structures of low-power Dual-edge triggered Static Pulsed Flip-Flops (DSPFF) are presented in this paper. They are composed of a dualedge pulse generator and a static f...
Aliakbar Ghadiri, Hamid Mahmoodi-Meimand
MOMPES
2008
IEEE
14 years 4 months ago
Architectural Concurrency Equivalence with Chaotic Models
During its lifetime, embedded systems go through multiple changes to their runtime architecture. That is, threads, processes, and processor are added or removed to/from the softwa...
Dionisio de Niz
DSD
2009
IEEE
118views Hardware» more  DSD 2009»
14 years 1 months ago
On the Risk of Fault Coupling over the Chip Substrate
—Duplication and comparison has proven to be an efficient method for error detection. Based on this generic principle dual core processor architectures with output comparison ar...
Peter Tummeltshammer, Andreas Steininger
DAC
2000
ACM
14 years 11 months ago
The use of carry-save representation in joint module selection and retiming
Joint module selection and retiming is a powerful technique to optimize the implementation cost and the speed of a circuit specified using a synchronous data-flow graph (DFG). In ...
Zhan Yu, Kei-Yong Khoo, Alan N. Willson Jr.