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PLDI
2009
ACM
14 years 2 months ago
Parallelizing sequential applications on commodity hardware using a low-cost software transactional memory
Multicore designs have emerged as the mainstream design paradigm for the microprocessor industry. Unfortunately, providing multiple cores does not directly translate into performa...
Mojtaba Mehrara, Jeff Hao, Po-Chun Hsu, Scott A. M...
ICCL
1998
IEEE
14 years 8 days ago
Location-Independent Communication for Mobile Agents: A Two-Level Architecture
We study communication primitives for interaction between mobile agents. They can be classified into two groups. At a low level there are location dependent primitives that require...
Peter Sewell, Pawel T. Wojciechowski, Benjamin C. ...
IEEEPACT
2006
IEEE
14 years 2 months ago
A two-phase escape analysis for parallel java programs
Thread escape analysis conservatively determines which objects may be accessed in more than one thread. Thread escape analysis is useful for a variety of purposes – finding rac...
Kyungwoo Lee, Samuel P. Midkiff
IEEEPACT
2009
IEEE
14 years 2 months ago
Interprocedural Load Elimination for Dynamic Optimization of Parallel Programs
Abstract—Load elimination is a classical compiler transformation that is increasing in importance for multi-core and many-core architectures. The effect of the transformation is ...
Rajkishore Barik, Vivek Sarkar
EUROPAR
2007
Springer
14 years 2 months ago
Delayed Side-Effects Ease Multi-core Programming
Computer systems are increasingly parallel and heterogeneous, while programs are still largely written in sequential languages. The obvious suggestion that the compiler should auto...
Anton Lokhmotov, Alan Mycroft, Andrew Richards