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» A Component Architecture for FPGA-Based, DSP System Design
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DATE
1998
IEEE
153views Hardware» more  DATE 1998»
14 years 26 days ago
An Energy-Conscious Exploration Methodology for Reconfigurable DSPs
As the "system-on-a-chip" concept is rapidly becoming a reality, time-to-market and product complexity push the reuse of complex macromodules. Circuits combining a varie...
Jan M. Rabaey, Marlene Wan
FPL
2008
Springer
119views Hardware» more  FPL 2008»
13 years 10 months ago
An FPGA-based high-speed, low-latency trigger processor for high-energy physics
An example of an FPGA based application for a high-energy physics experiment is presented which features all facets of modern FPGA design. The special requirements here are high b...
Jan de Cuveland, Felix Rettig, Venelin Angelov, Vo...
CVPR
2007
IEEE
13 years 8 months ago
PrivacyCam: a Privacy Preserving Camera Using uCLinux on the Blackfin DSP
Considerable research work has been done in the area of surveillance and biometrics, where the goals have always been high performance, robustness in security and cost optimizatio...
Ankur Chattopadhyay, Terrance E. Boult
HICSS
2006
IEEE
131views Biometrics» more  HICSS 2006»
14 years 2 months ago
Design and Characterization of a Hardware Encryption Management Unit for Secure Computing Platforms
— Software protection is increasingly necessary for uses in commercial systems, digital content distributors, and military systems. The Secure Software (SecSoft) architecture is ...
Anthony J. Mahar, Peter M. Athanas, Stephen D. Cra...
JPDC
2008
108views more  JPDC 2008»
13 years 8 months ago
Energy minimization with loop fusion and multi-functional-unit scheduling for multidimensional DSP
Energy saving is becoming one of the major design issues in processor architectures with multiple functional units (FUs). Nested loops are usually the most critical part in multim...
Meikang Qiu, Edwin Hsing-Mean Sha, Meilin Liu, Man...