— The frenetic development of the current architectures places a strain on the current state-of-the-art programming environments. Harnessing the full potential of such architectu...
George Bosilca, Aurelien Bouteiller, Anthony Danal...
Compared to higher-precision data formats, lower-precision data formats result in higher performance for computationally intensive applications on FPGAs because of their lower res...
Junqing Sun, Gregory D. Peterson, Olaf O. Storaasl...
Device and interconnect fabrics at the nanoscale will have a density of defects and susceptibility to transient faults far exceeding those of current silicon technologies. In this...
Andrey V. Zykov, Elias Mizan, Margarida F. Jacome,...
Web search engines are facing formidable performance challenges as they need to process thousands of queries per second over billions of documents. To deal with this heavy workloa...
This paper presents LOTTERYBUS, a novel high-performance communication architecture for system-on-chip (SoC) designs. The LOTTERYBUS architecture was designed to address the follo...