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» A Component Model for the AUTOSAR Virtual Function Bus
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HPCA
2003
IEEE
14 years 10 months ago
Deterministic Clock Gating for Microprocessor Power Reduction
With the scaling of technology and the need for higher performance and more functionality, power dissipation is becoming a major bottleneck for microprocessor designs. Pipeline ba...
Hai Li, Swarup Bhunia, Yiran Chen, T. N. Vijaykuma...
ICCAD
2004
IEEE
128views Hardware» more  ICCAD 2004»
14 years 6 months ago
Power estimation for cycle-accurate functional descriptions of hardware
— Cycle-accurate functional descriptions (CAFDs) are being widely adopted in integrated circuit (IC) design flows. Power estimation can potentially benefit from the inherent in...
Lin Zhong, Srivaths Ravi, Anand Raghunathan, Niraj...
USENIX
2003
13 years 11 months ago
The Design of the {OpenBSD} Cryptographic Framework
Cryptographic transformations are a fundamental building block in many security applications and protocols. To improve performance, several vendors market hardware accelerator car...
Angelos D. Keromytis, Jason L. Wright, Theo de Raa...
ISSS
1996
IEEE
169views Hardware» more  ISSS 1996»
14 years 1 months ago
The Use of a Virtual Instruction Set for the Software Synthesis of HW/SW Embedded Systems
The application range of the embedded computing is going to cover the majority of the market products spanning from consumer electronic, automotive, telecom and process control. F...
Alessandro Balboni, William Fornaciari, M. Vincenz...
DT
2006
180views more  DT 2006»
13 years 9 months ago
A SystemC Refinement Methodology for Embedded Software
process: Designers must define higher abstraction levels that allow system modeling. They must use description languages that handle both hardware and software components to descri...
Jérôme Chevalier, Maxime de Nanclas, ...