Sciweavers

1098 search results - page 125 / 220
» A Cost-Effective Clustered Architecture
Sort
View
VLSISP
2008
159views more  VLSISP 2008»
13 years 10 months ago
Effective Code Generation for Distributed and Ping-Pong Register Files: A Case Study on PAC VLIW DSP Cores
The compiler is generally regarded as the most important software component that supports a processor design to achieve success. This paper describes our application of the open re...
Yung-Chia Lin, Chia-Han Lu, Chung-Ju Wu, Chung-Lin...
ICDE
2006
IEEE
146views Database» more  ICDE 2006»
14 years 11 months ago
Using XML to Build Efficient Transaction-Time Temporal Database Systems on Relational Databases
In this paper, we present the ArchIS system that achieves full-functionality transaction-time databases without requiring temporal extensions in XML or database standards. ArchIS&...
Fusheng Wang, Xin Zhou, Carlo Zaniolo
DAC
2004
ACM
14 years 11 months ago
The best of both worlds: the efficient asynchronous implementation of synchronous specifications
The desynchronization approach combines a traditional synchronous specification style with a robust asynchronous implementation model. The main contribution of this paper is the d...
Abhijit Davare, Kelvin Lwin, Alex Kondratyev, Albe...
DAC
2005
ACM
14 years 11 months ago
Power-aware placement
Lowering power is one of the greatest challenges facing the IC industry today. We present a power-aware placement method that simultaneously performs (1) activity-based register c...
Yongseok Cheon, Pei-Hsin Ho, Andrew B. Kahng, Sher...
ICCAD
2001
IEEE
103views Hardware» more  ICCAD 2001»
14 years 7 months ago
Interconnect Resource-Aware Placement for Hierarchical FPGAs
In this paper, we utilize Rent’s rule as an empirical measure for efficient clustering and placement of circuits on hierarchical FPGAs. We show that careful matching of design c...
Amit Singh, Ganapathy Parthasarathy, Malgorzata Ma...