1614 search results - page 30 / 323 » A Customizable Implementation of RMI for High Performance Co... |
DAC
2005
ACM
14 years 9 months ago
2005
ACM
This paper presents two novel and high performance hardware architectures, implemented in FPGA technology, for the KASUMI block cipher; this algorithm lies at the core of the conf...
ISCAPDCS
2001
13 years 9 months ago
2001
The implementation of modern high performance computer is increasingly directed toward parallelism in the hardware. However, most of the current fetch units are limited to one bra...
ICASSP
2011
IEEE
12 years 11 months ago
2011
IEEE
This paper proposes an ultra low energy FFT processor suitable for sensor applications. The processor is based on R4MDC but achieves full utilization of computational elements. It...
IJBRA
2008
13 years 8 months ago
2008
: Fast and accurate 3D object reconstruction and partial 3D component retrieval from 2D image slices represent a difficult and challenging problem. To group related objects on diff...
PC
2007
13 years 7 months ago
2007
The Sony–Toshiba–IBM Cell Broadband Engine (Cell/B.E.) is a heterogeneous multicore architecture that consists of a traditional microprocessor (PPE) with eight SIMD co-process...