714 search results - page 119 / 143 » A Decompression Architecture for Low Power Embedded Systems |
IROS
2009
IEEE
14 years 2 months ago
2009
IEEE
— In this paper the compliant low level control of a biologically inspired control architecture suited for bipedal dynamic walking robots is presented. It consists of elastic mec...
DAC
2011
ACM
12 years 7 months ago
2011
ACM
SRAM design has been a major challenge for nanoscale manufacturing technology. We propose a new bit cell repair scheme for designing maximum-information memory system (MIMS). Unli...
ESTIMEDIA
2008
Springer
13 years 9 months ago
2008
Springer
The relentless increase in multimedia embedded system application requirements as well as improvements in IC design technology have motivated the deployment of chip multiprocessor ...
CASES
2008
ACM
13 years 9 months ago
2008
ACM
We introduce the first approach that can actively control multiple hardware intellectual property (IP) cores used in an integrated circuit (IC). The IP rights owner(s) can remotel...
RTAS
2010
IEEE
13 years 6 months ago
2010
IEEE
—Hardware-managed caches introduce large amounts of timing variability, complicating real-time system design. One alternative is a memory system with scratchpad memories which im...