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» A Decompression Architecture for Low Power Embedded Systems
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CASES
2006
ACM
14 years 14 days ago
Power efficient branch prediction through early identification of branch addresses
Ever increasing performance requirements have elevated deeply pipelined architectures to a standard even in the embedded processor domain, requiring the incorporation of dynamic b...
Chengmo Yang, Alex Orailoglu
VLSID
2007
IEEE
130views VLSI» more  VLSID 2007»
14 years 9 months ago
Memory Architecture Exploration for Power-Efficient 2D-Discrete Wavelet Transform
The Discrete Wavelet Transform (DWT) forms the core of the JPEG2000 image compression algorithm. Since the JPEG2000 compression application is heavily data-intensive, the overall ...
Rahul Jain, Preeti Ranjan Panda
DAC
2000
ACM
14 years 9 months ago
Power analysis of embedded operating systems
The increasing complexity and software content of embedded systems has led to the common use of sophisticated system software that helps applications use the underlying hardware r...
Robert P. Dick, Ganesh Lakshminarayana, Anand Ragh...
MM
2003
ACM
161views Multimedia» more  MM 2003»
14 years 2 months ago
Integrated power management for video streaming to mobile handheld devices
Optimizing user experience for streaming video applications on handheld devices is a significant research challenge. In this paper, we propose an integrated power management appr...
Shivajit Mohapatra, Radu Cornea, Nikil D. Dutt, Al...
ICCD
2003
IEEE
140views Hardware» more  ICCD 2003»
14 years 5 months ago
Cost-Efficient Memory Architecture Design of NAND Flash Memory Embedded Systems
NAND flash memory has become an indispensable component in embedded systems because of its versatile features such as non-volatility, solid-state reliability, low cos,t and high d...
Chanik Park, Jaeyu Seo, Dongyoung Seo, Shinhan Kim...