714 search results - page 6 / 143 » A Decompression Architecture for Low Power Embedded Systems |
ISCAS
2002
IEEE
14 years 12 days ago
2002
IEEE
Pre-designed configurable platforms, possessing microprocessors, memories, and numerous peripherals on a single chip, are increasing in popularity in embedded system design. Platf...
VLSID
2007
IEEE
14 years 7 months ago
2007
IEEE
Register file banking is an effective alternative to monolithic register files in embedded processor based systems. In this work, we propose techniques for performing application s...
SAMOS
2007
Springer
14 years 1 months ago
2007
Springer
This paper presents an overview of trends in low power handset SDR implementations. With the market for SDR-enabled handsets expected to grow to 200M units by 2014, the barriers to...
CASES
2006
ACM
14 years 1 months ago
2006
ACM
We propose an architecture that uses NAND flash memory to reduce main memory power in web server platforms. Our architecture uses a two level file buffer cache composed of a re...
ISLPED
1999
ACM
13 years 11 months ago
1999
ACM
We propose a technique for reducing the energy required by rmware code to execute on embedded systems. The method is based on the idea of compressing the most commonly executed in...