66 search results - page 9 / 14 » A Design of a Next Generation IX using MPLS Technology |
DATE
2008
IEEE
13 years 9 months ago
2008
IEEE
Advanced MOSFETs such as Strained Silicon (SS) devices have emerged as critical enablers to keep Moore's law on track for sub100nm technologies. Use of Strained Silicon devic...
VLSID
2008
IEEE
14 years 8 months ago
2008
IEEE
Abstract-- With the continuous downscaling of CMOS technologies, the reliability has become a major bottleneck in the evolution of the next generation systems. Technology trends su...
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
The NETWORK-ON-CHIP (NOC) interconnection paradigm has been gaining momentum thanks to its flexibility, scalability and suitability to deep submicron technology processes. The ne...
ARITH
2007
IEEE
14 years 1 months ago
2007
IEEE
The floating point unit of the next generation PowerPC is detailed. It has been tested at over 5 GHz. The design supports an extremely aggressive cycle time of 13 FO4 using a tech...
IWCMC
2006
ACM
14 years 1 months ago
2006
ACM
In the Next Generation Networks (NGNs) users will carry multiple devices forming cooperative networks known as Personal Area Networks (PANs). Some existing technologies enable thi...