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ISCAS
2006
IEEE
122views Hardware» more  ISCAS 2006»
14 years 3 months ago
256-channel integrated neural interface and spatio-temporal signal processor
Abstract- We present an architecture and VLSI implemen- Various strategies in the analysis of spatio-temporal dynamtation of a distributed neural interface and spatio-temporal ics ...
J. N. Y. Aziz, Roman Genov, B. R. Bardakjian, M. D...
MOBISYS
2007
ACM
14 years 9 months ago
Health-OS: : a position paper
The area of medical monitoring and diagnostics is of particular importance and relevance today. Modern nanotechnology has reduced prices and size of increasingly sophisticated sen...
Darko Kirovski, Nuria Oliver, Mike Sinclair, Desne...
BMCBI
2008
133views more  BMCBI 2008»
13 years 9 months ago
SPIKE - a database, visualization and analysis tool of cellular signaling pathways
Background: Biological signaling pathways that govern cellular physiology form an intricate web of tightly regulated interlocking processes. Data on these regulatory networks are ...
Ran Elkon, Rita Vesterman, Nira Amit, Igor Ulitsky...
TVLSI
2008
133views more  TVLSI 2008»
13 years 9 months ago
A Medium-Grain Reconfigurable Architecture for DSP: VLSI Design, Benchmark Mapping, and Performance
Reconfigurable hardware has become a well-accepted option for implementing digital signal processing (DSP). Traditional devices such as field-programmable gate arrays offer good fi...
Mitchell J. Myjak, José G. Delgado-Frias
IPPS
2006
IEEE
14 years 3 months ago
Implementation of a reconfigurable hard real-time control system for mechatronic and automotive applications
Control algorithms implemented directly in hardware take advantage of parallel signal processing. Furthermore, implementing controller functionality in reconfigurable hardware fac...
Steffen Toscher, Roland Kasper, Thomas Reinemann