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DOLAP
2006
ACM
14 years 1 months ago
Designing what-if analysis: towards a methodology
In order to be able to evaluate beforehand the impact of a strategical or tactical move, decision makers need reliable previsional systems. What-if analysis satisfies this need b...
Matteo Golfarelli, Stefano Rizzi, Andrea Proli
MICRO
2007
IEEE
141views Hardware» more  MICRO 2007»
14 years 1 months ago
Composable Lightweight Processors
Modern chip multiprocessors (CMPs) are designed to exploit both instruction-level parallelism (ILP) within processors and thread-level parallelism (TLP) within and across processo...
Changkyu Kim, Simha Sethumadhavan, M. S. Govindan,...
QEST
2009
IEEE
14 years 2 months ago
Language-Level Symmetry Reduction for Probabilistic Model Checking
—Symmetry reduction is a technique for combating state-space explosion in model checking. The generic representatives approach to symmetry reduction uses a language-level transla...
Alastair F. Donaldson, Alice Miller, David Parker
FCCM
2006
IEEE
120views VLSI» more  FCCM 2006»
14 years 1 months ago
FPGAs, GPUs and the PS2 - A Single Programming Methodology
Field programmable gate arrays (FPGAs), graphics processing units (GPUs) and Sony’s Playstation 2 vector units offer scope for hardware acceleration of applications. Implementin...
Lee W. Howes, Paul Price, Oskar Mencer, Olav Beckm...
KES
2010
Springer
13 years 6 months ago
Development of Delay Estimation Method Using Probe Data for Adaptive Signal Control Algorithm
This study describes a real time delay estimation method using probe data with adaptive signal control algorithm, “CARREN” (Control Algorithm Retuning paRameters with self perf...
Hisatomo Hanabusa, Morihisa Iijima, Ryota Horiguch...