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ASAP
2004
IEEE
123views Hardware» more  ASAP 2004»
13 years 11 months ago
A Packet Scheduling Algorithm for IPSec Multi-Accelerator Based Systems
IPSec is a suite of protocols that adds security to communications at the IP level. Protocols within the IPSec suite make extensive use of cryptographic algorithms. Since these al...
Fabien Castanier, Alberto Ferrante, Vincenzo Piuri
IPPS
2008
IEEE
14 years 2 months ago
Wait-free Programming for General Purpose Computations on Graphics Processors
The fact that graphics processors (GPUs) are today’s most powerful computational hardware for the dollar has motivated researchers to utilize the ubiquitous and powerful GPUs fo...
Phuong Hoai Ha, Philippas Tsigas, Otto J. Anshus
IPPS
2006
IEEE
14 years 1 months ago
Compiler assisted dynamic management of registers for network processors
Modern network processors support high levels of parallelism in packet processing by supporting multiple threads that execute on a micro-engine. Threads switch context upon encoun...
R. Collins, Fernando Alegre, Xiaotong Zhuang, Sant...
HPCA
2006
IEEE
14 years 8 months ago
CORD: cost-effective (and nearly overhead-free) order-recording and data race detection
Chip-multiprocessors are becoming the dominant vehicle for general-purpose processing, and parallel software will be needed to effectively utilize them. This parallel software is ...
Milos Prvulovic
WSC
2008
13 years 10 months ago
Simplification and aggregation strategies applied for factory analysis in conceptual phase using simulation
Despite that simulation possesses an establish background and offers tremendous promise for designing and analyzing complex production systems, manufacturing industry has been les...
Matias Urenda Moris, Amos Ng, Jacob Svensson