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IEEEPACT
2009
IEEE
14 years 2 months ago
Chainsaw: Using Binary Matching for Relative Instruction Mix Comparison
With advances in hardware, instruction set architectures are undergoing continual evolution. As a result, compilers are under constant pressure to adapt and take full advantage of...
Tipp Moseley, Dirk Grunwald, Ramesh Peri
HPCA
1995
IEEE
13 years 11 months ago
The Effects of STEF in Finely Parallel Multithreaded Processors
The throughput of a multiple-pipelined processor suffers due to lack of sufficient instructions to make multiple pipelines busy and due to delays associated with pipeline depende...
Yamin Li, Wanming Chu
SBACPAD
2003
IEEE
106views Hardware» more  SBACPAD 2003»
14 years 23 days ago
A Parallel Implementation of the LTSn Method for a Radiative Transfer Problem
— A radiative transfer solver that implements the LTSn method was optimized and parallelized using the MPI message passing communication library. Timing and profiling informatio...
Roberto P. Souto, Haroldo F. de Campos Velho, Step...
IPPS
2010
IEEE
13 years 5 months ago
Solving the advection PDE on the cell broadband engine
In this paper we present the venture of porting two different algorithms for solving the two-dimensional advection PDE on the CBE platform, an in-place and an outof-place one, and ...
Georgios Rokos, Gerassimos Peteinatos, Georgia Kou...
IPPS
2007
IEEE
14 years 1 months ago
A Heterogeneous Lightweight Multithreaded Architecture
Programs with irregular patterns of dynamic data structures and/or those with complicated control structures such as recursion are notoriously difficult to parallelize efficient...
Sheng Li, Amit Kashyap, Shannon K. Kuntz, Jay B. B...