The register file is a power-hungry device in modern architectures. Current research on compiler technology and computer architectures encourages the implementation of larger dev...
MaxNet is a distributed congestion control architecture in which only the most severely bottlenecked link on the end-to-end path generates the congestion signal that controls the s...
Bartek P. Wydrowski, Lachlan L. H. Andrew, Iven M....
Power aware computing has become popular recently and many techniques have been proposed to manage the energy consumption for traditional real-time applications. We have previousl...
Dakai Zhu, Nevine AbouGhazaleh, Daniel Mossé...
This paper examines the scalable parallel implementation of QR factorization of a general matrix, targeting SMP and multi-core architectures. Two implementations of algorithms-by-...
The correct admission of flows in the Differentiated Services (DiffServ) environment is critical to provide stable and predictable quality of service (QoS) to the end user. Withou...