We present Justice, a set of extensions to the Liberty simulation infrastructure that model area, wire length, and power consumption in processor architectures. Given an architectu...
In this paper, we propose a multithreaded processor architecture which improves machine throughput. In our processor architecture, instructions from different threads (not a singl...
Fetch gating mechanisms have been proposed to gate the processor pipeline to reduce the wasted energy consumption due to wrongpath (i.e. mis-speculated) instructions. These scheme...
Chang Joo Lee, Hyesoon Kim, Onur Mutlu, Yale N. Pa...
Recognizing speech, gestures, and visual features are important interface capabilities for future embedded mobile systems. Unfortunately, the real-time performance requirements of...
Clustered architectures are a solution to the bottleneck of centralized register files in superscalar and VLIW processors. The main challenge associated with clustered architectu...