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» A Distributed Control Path Architecture for VLIW Processors
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IPPS
2000
IEEE
13 years 12 months ago
MAJC-5200: A High Performance Microprocessor for Multimedia Computing
The newly introduced Microprocessor Architecture for Java Computing MAJC supports parallelism in a hierarchy of levels: multiprocessors on chip,vertical micro threading, instruct...
Subramania Sudharsanan
EUROPAR
2004
Springer
14 years 28 days ago
Architecture-Independent Meta-optimization by Aggressive Tail Splitting
Several optimization techniques are hindered by uncertainties about the control flow in a program, which can generally not be determined by static methods at compile time. We pres...
Michael Rock, Andreas Koch
MICRO
2010
IEEE
149views Hardware» more  MICRO 2010»
13 years 5 months ago
Improving SIMT Efficiency of Global Rendering Algorithms with Architectural Support for Dynamic Micro-Kernels
Wide Single Instruction, Multiple Thread (SIMT) architectures often require a static allocation of thread groups that are executed in lockstep throughout the entire application ker...
Michael Steffen, Joseph Zambreno
HPCA
1999
IEEE
13 years 12 months ago
Instruction Recycling on a Multiple-Path Processor
Processors that can simultaneously execute multiple paths of execution will only exacerbate the fetch bandwidth problem already plaguing conventional processors. On a multiple-pat...
Steven Wallace, Dean M. Tullsen, Brad Calder
HPCA
2009
IEEE
14 years 8 months ago
Bridging the computation gap between programmable processors and hardwired accelerators
New media and signal processing applications demand ever higher performance while operating within the tight power constraints of mobile devices. A range of hardware implementatio...
Kevin Fan, Manjunath Kudlur, Ganesh S. Dasika, Sco...