238 search results - page 9 / 48 » A Distributed Control Path Architecture for VLIW Processors |
JUCS
2000
13 years 7 months ago
2000
: This paper presents an evaluation of our Scheduled Dataflow (SDF) Processor. Recent focus in the field of new processor architectures is mainly on VLIW (e.g. IA-64), superscalar ...
ICDCS
2012
IEEE
11 years 10 months ago
2012
IEEE
Datacenter networks typically have many paths connecting each host pair to achieve high bisection bandwidth for arbitrary communication patterns. Fully utilizing the bisection ban...
ICPP
1993
IEEE
13 years 11 months ago
1993
IEEE
SIMD or vector computers and collection-oriented languages, like C , are designed to perform the same computation on each data item or on just a subset of the data. Subsets of pro...
SBACPAD
2006
IEEE
14 years 1 months ago
2006
IEEE
Neural-inspired branch predictors achieve very low branch misprediction rates. However, previously proposed implementations have a variety of characteristics that make them challe...
FPGA
2004
ACM
14 years 28 days ago
2004
ACM
The speedup over a microprocessor that can be achieved by implementing some programs on an FPGA has been extensively reported. This paper presents an analysis, both quantitative a...