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» A Dynamic Multithreading Processor
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ICPP
2009
IEEE
14 years 4 months ago
Bank-aware Dynamic Cache Partitioning for Multicore Architectures
Abstract—As Chip-Multiprocessor systems (CMP) have become the predominant topology for leading microprocessors, critical components of the system are now integrated on a single c...
Dimitris Kaseridis, Jeffrey Stuecheli, Lizy K. Joh...
ISCA
2009
IEEE
318views Hardware» more  ISCA 2009»
14 years 4 months ago
Thread criticality predictors for dynamic performance, power, and resource management in chip multiprocessors
With the shift towards chip multiprocessors (CMPs), exploiting and managing parallelism has become a central problem in computer systems. Many issues of parallelism management boi...
Abhishek Bhattacharjee, Margaret Martonosi
SIGCOMM
2009
ACM
14 years 4 months ago
A programmable, generic forwarding element approach for dynamic network functionality
Communication networks are growing exponentially, and new services and applications are being introduced unceasingly. To meet the demands of these services and applications, curre...
Ran Giladi, Niv Yemini
DSN
2007
IEEE
14 years 4 months ago
Utilizing Dynamically Coupled Cores to Form a Resilient Chip Multiprocessor
Aggressive CMOS scaling will make future chip multiprocessors (CMPs) increasingly susceptible to transient faults, hard errors, manufacturing defects, and process variations. Exis...
Christopher LaFrieda, Engin Ipek, José F. M...
RTAS
2005
IEEE
14 years 3 months ago
Feedback-Based Dynamic Voltage and Frequency Scaling for Memory-Bound Real-Time Applications
Dynamic voltage and frequency scaling is increasingly being used to reduce the energy requirements of embedded and real-time applications by exploiting idle CPU resources, while s...
Christian Poellabauer, Leo Singleton, Karsten Schw...