1834 search results - page 250 / 367 » A Dynamic Multithreading Processor |
ISCA
1997
IEEE
14 years 2 months ago
1997
IEEE
Improvements in main memory speeds have not kept pace with increasing processor clock frequency and improved exploitation of instruction-level parallelism. Consequently, the gap b...
MICRO
1997
IEEE
14 years 2 months ago
1997
IEEE
We describe Dead Value Information (DVI) and introduce three new optimizations which exploit it. DVI provides assertions that certain register values are dead, meaning they will n...
PARLE
1993
14 years 2 months ago
1993
: Parallel database systems aim at providing high throughput for OLTP transactions as well as short response times for complex and data-intensive queries. Shared nothing systems re...
CAINE
2006
13 years 11 months ago
2006
This research addresses a major gap in our conceptual understanding of synaptic and brain-like network dynamics. Over the course of several years we have designed and implemented ...
ISCA
2011
IEEE
13 years 1 months ago
2011
IEEE
Conventional high-performance processors utilize register renaming and complex broadcast-based scheduling logic to steer instructions into a small number of heavily-pipelined exec...