— We propose a low-leakage register file cell design based on the observation that the physical registers in a superscalar processor have very short life cycles. When a register...
Lingling Jin, Wei Wu, Jun Yang 0002, Chuanjun Zhan...
In this paper, we address the power-aware scheduling of sporadic constrained-deadline hard real-time tasks using dynamic voltage scaling upon multiprocessor platforms. We propose ...
Grid applications that use a considerable number of processors for their computations need effective predictions of the expected computation times on the different nodes. Currentl...
– To make a mobile robot with real-time vision system adapt to the highly dynamic environments and emergencies under the real-time constraints, a significant account of processin...
– In support of continuously increasing line rates and various Internet services, multiprocessor-based linecards have appeared in next-generation routers, significantly improving...