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» A Dynamic Multithreading Processor
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ISCA
2010
IEEE
237views Hardware» more  ISCA 2010»
13 years 7 months ago
High performance cache replacement using re-reference interval prediction (RRIP)
Practical cache replacement policies attempt to emulate optimal replacement by predicting the re-reference interval of a cache block. The commonly used LRU replacement policy alwa...
Aamer Jaleel, Kevin B. Theobald, Simon C. Steely J...
IPPS
2010
IEEE
13 years 6 months ago
Inter-block GPU communication via fast barrier synchronization
The graphics processing unit (GPU) has evolved from a fixedfunction processor with programmable stages to a programmable processor with many fixed-function components that deliver...
Shucai Xiao, Wu-chun Feng
WAOA
2010
Springer
246views Algorithms» more  WAOA 2010»
13 years 6 months ago
Tradeoff between Energy and Throughput for Online Deadline Scheduling
The past few years have witnessed a number of interesting online algorithms for deadline scheduling in the dynamic speed scaling model (in which a processor can vary its speed to ...
Ho-Leung Chan, Tak Wah Lam, Rongbin Li
ISCA
2011
IEEE
486views Hardware» more  ISCA 2011»
13 years 19 days ago
Dark silicon and the end of multicore scaling
Since 2005, processor designers have increased core counts to exploit Moore’s Law scaling, rather than focusing on single-core performance. The failure of Dennard scaling, to wh...
Hadi Esmaeilzadeh, Emily R. Blem, Renée St....
CLUSTER
2010
IEEE
13 years 17 days ago
Middleware support for many-task computing
Many-task computing aims to bridge the gap between two computing paradigms, high throughput computing and high performance computing. Many-task computing denotes highperformance co...
Ioan Raicu, Ian T. Foster, Mike Wilde, Zhao Zhang,...