1834 search results - page 316 / 367 » A Dynamic Multithreading Processor |
ICCD
2006
IEEE
14 years 5 months ago
2006
IEEE
— L1 data caches in high-performance processors continue to grow in set associativity. Higher associativity can significantly increase the cache energy consumption. Cache access...
CGO
2010
IEEE
14 years 3 months ago
2010
IEEE
Tiling, a key transformation for optimizing programs, has been widely studied in literature. Parameterized tiled code is important for auto-tuning systems since they often execute...
ICS
2009
Tsinghua U.
14 years 3 months ago
2009
Tsinghua U.
Tiling is a crucial loop transformation for generating high performance code on modern architectures. Efficient generation of multilevel tiled code is essential for maximizing da...
DATE
2009
IEEE
14 years 3 months ago
2009
IEEE
—Dynamic Thermal Management techniques have been widely accepted as a thermal solution for their low cost and simplicity. The techniques have been used to manage the heat dissipa...
DATE
2009
IEEE
14 years 3 months ago
2009
IEEE
Abstract—To deal with the “memory wall” problem, microprocessors include large secondary on-chip caches. But as these caches enlarge, they originate a new latency gap between...