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» A Dynamic Multithreading Processor
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ISCA
2010
IEEE
185views Hardware» more  ISCA 2010»
14 years 2 months ago
Dynamic warp subdivision for integrated branch and memory divergence tolerance
SIMD organizations amortize the area and power of fetch, decode, and issue logic across multiple processing units in order to maximize throughput for a given area and power budget...
Jiayuan Meng, David Tarjan, Kevin Skadron
IWNAS
2008
IEEE
14 years 3 months ago
Software Barrier Performance on Dual Quad-Core Opterons
Multi-core processors based SMP servers have become building blocks for Linux clusters in recent years because they can deliver better performance for multi-threaded programs thro...
Jie Chen, William A. Watson III
GI
2004
Springer
14 years 2 months ago
CARUSO - Project Goals and Principal Approach
: This paper proposes CARUSO – a new SoC approach that emphasizes Connectivity, Autonomic/Organic computing principles, Real-time, and Ultra-low power requirements. The requireme...
Uwe Brinkschulte, Jürgen Becker, Klaus Dorfm&...
EUC
2008
Springer
13 years 10 months ago
Reducing Context Switch Overhead with Compiler-Assisted Threading
Multithreading is an important software modularization technique. However, it can incur substantial overheads, especially in processors where the amount of architecturally visible...
Pekka Jääskeläinen, Pertti Kellom&a...
MICRO
2010
IEEE
115views Hardware» more  MICRO 2010»
13 years 7 months ago
Per-Thread Cycle Accounting
This paper proposes a cycle accounting architecture for Simultaneous Multithreading (SMT) processors that estimates the execution times for each of the threads had they been execu...
Stijn Eyerman, Lieven Eeckhout