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» A Dynamically Reconfigurable Queue Scheduler
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DATE
2004
IEEE
151views Hardware» more  DATE 2004»
13 years 11 months ago
Dynamic Voltage and Cache Reconfiguration for Low Power
Given a set of real-time tasks scheduled using the earliest deadline first (EDF) algorithm, we discuss two techniques for reducing power consumption while meeting all timing requi...
André C. Nácul, Tony Givargis
ADAEUROPE
2005
Springer
14 years 1 months ago
Integrating Application-Defined Scheduling with the New Dispatching Policies for Ada Tasks
: In previous papers we had presented an application program interface (API) that enabled applications to use application-defined scheduling algorithms for Ada tasks in a way compa...
Mario Aldea Rivas, Javier Miranda, Michael Gonz&aa...
IPPS
2005
IEEE
14 years 1 months ago
Configuration Steering for a Reconfigurable Superscalar Processor
An architecture for a reconfigurable superscalar processor is described in which some of its execution units are implemented in reconfigurable hardware. The overall configuration ...
Brian F. Veale, John K. Antonio, Monte P. Tull
ICPP
2008
IEEE
14 years 2 months ago
Optimizing Issue Queue Reliability to Soft Errors on Simultaneous Multithreaded Architectures
The issue queue (IQ) is a key microarchitecture structure for exploiting instruction-level and thread-level parallelism in dynamically scheduled simultaneous multithreaded (SMT) p...
Xin Fu, Wangyuan Zhang, Tao Li, José A. B. ...
RSP
2000
IEEE
156views Control Systems» more  RSP 2000»
14 years 7 days ago
Quasi-Static Scheduling of Reconfigurable Dataflow Graphs for DSP Systems
Dataflow programming has proven to be popular for representing applications in rapid prototyping tools for digital signal processing (DSP); however, existing dataflow design tools...
Bishnupriya Bhattacharya, Shuvra S. Bhattacharyya