131 search results - page 7 / 27 » A Dynamically Reconfigurable Queue Scheduler |
FTDCS
1999
IEEE
14 years 4 days ago
1999
IEEE
The impact of buffer management and priority scheduling is examined in stressful scenarios when the aggregate incoming traffic is higher than the output link capacity of an Asynch...
EUROPAR
2004
Springer
13 years 11 months ago
2004
Springer
Abstract This paper proposes an approach to continuously optimizing parallel scientific applications with dynamically changing architectures. We achieve this by combining a dynamic...
EUROPAR
2005
Springer
14 years 1 months ago
2005
Springer
Dynamic instruction scheduling logic is one of the most critical and cycle-limiting structures in modern superscalar processors, and it is not easily pipelined without significant ...
CODES
2007
IEEE
14 years 2 months ago
2007
IEEE