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EMSOFT
2005
Springer
14 years 1 months ago
Optimizing inter-processor data locality on embedded chip multiprocessors
Recent research in embedded computing indicates that packing multiple processor cores on the same die is an effective way of utilizing the ever-increasing number of transistors. T...
Guilin Chen, Mahmut T. Kandemir
PCRCW
1997
Springer
13 years 12 months ago
ChaosLAN: Design and Implementation of a Gigabit LAN Using Chaotic Routing
In recent years, theChaos Project at theUniversityofWashingtonhas analyzed and simulated a dozen routing algorithms. Three new routing algorithms have been invented; of these, the...
Neil R. McKenzie, Kevin Bolding, Carl Ebeling, Law...
PLDI
2012
ACM
11 years 10 months ago
Scalable and precise dynamic datarace detection for structured parallelism
Existing dynamic race detectors suffer from at least one of the following three limitations: (i) space overhead per memory location grows linearly with the number of parallel thre...
Raghavan Raman, Jisheng Zhao, Vivek Sarkar, Martin...
CGO
2006
IEEE
14 years 1 months ago
Thread-Shared Software Code Caches
Software code caches are increasingly being used to amortize the runtime overhead of dynamic optimizers, simulators, emulators, dynamic translators, dynamic compilers, and other t...
Derek Bruening, Vladimir Kiriansky, Timothy Garnet...
AADEBUG
2005
Springer
14 years 1 months ago
Tdb: a source-level debugger for dynamically translated programs
Debugging techniques have evolved over the years in response to changes in programming languages, implementation techniques, and user needs. A new type of implementation vehicle f...
Naveen Kumar, Bruce R. Childers, Mary Lou Soffa