68 search results - page 9 / 14 » A Family of Logical Fault Models for Reversible Circuits |
ISCAS
1999
IEEE
13 years 11 months ago
1999
IEEE
An FPGA-based reconfigurable system may contain boards of FPGAs which are reconfigured for different applications and must work correctly. This paper presents a novel approach for...
VLSID
1997
IEEE
13 years 11 months ago
1997
IEEE
—Logical initializability is the property of a gate-level circuit whereby it can be driven to a unique start state when simulated by a three-valued (0, 1, ) simulator. In practic...
ITC
2003
IEEE
14 years 22 days ago
2003
IEEE
We present an efficient algorithm for identification of two-line bridges in combinational CMOS logic that narrows down the two-line bridge candidates based on tester responses for...
ISQED
2003
IEEE
14 years 22 days ago
2003
IEEE
A structurally testable delay fault might become untestable in the functional mode of the circuit due to logic or timing constraints or both. Experimental data suggests that there...
TCAD
2010
13 years 2 months ago
2010
Crosstalk faults have emerged as a significant mechanism for circuit failure. Long signal nets are of particular concern because they tend to have a higher coupling capacitance to...