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» A Fast Heuristic Algorithm for a Probe Mapping Problem
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ISSS
2000
IEEE
127views Hardware» more  ISSS 2000»
14 years 1 months ago
Lower Bound Estimation for Low Power High-Level Synthesis
This paper addresses the problem of estimating lower bounds on the power consumption in scheduled data flow graphs with a fixed number of allocated resources prior to binding. T...
Lars Kruse, Eike Schmidt, Gerd Jochens, Ansgar Sta...
CASES
2003
ACM
14 years 8 days ago
A hierarchical approach for energy efficient application design using heterogeneous embedded systems
Several features such as reconfiguration, voltage and frequency scaling, low-power operating states, duty-cycling, etc. are exploited for latency and energy efficient application ...
Sumit Mohanty, Viktor K. Prasanna
CP
2008
Springer
13 years 10 months ago
An Application of Constraint Programming to Superblock Instruction Scheduling
Modern computer architectures have complex features that can only be fully taken advantage of if the compiler schedules the compiled code. A standard region of code for scheduling ...
Abid M. Malik, Michael Chase, Tyrel Russell, Peter...
CIKM
2009
Springer
14 years 3 months ago
Adaptive relevance feedback in information retrieval
Relevance Feedback has proven very effective for improving retrieval accuracy. A difficult yet important problem in all relevance feedback methods is how to optimally balance the...
Yuanhua Lv, ChengXiang Zhai
ICCAD
2008
IEEE
138views Hardware» more  ICCAD 2008»
14 years 5 months ago
Fault tolerant placement and defect reconfiguration for nano-FPGAs
—When manufacturing nano-devices, defects are a certainty and reliability becomes a critical issue. Until now, the most pervasive methods used to address reliability, involve inj...
Amit Agarwal, Jason Cong, Brian Tagiku