This paper concerns automatic hardware synthesis from data flow graph (DFG) specification for fast HW/SW cosynthesis. A node in DFG represents a coarse grain block such as FIR and...
Fix positive integers B and w. Let C be a linear code over F2 of length Bw. The 2-regular-decoding problem is to find a nonzero codeword consisting of w length-B blocks, each of w...
Daniel J. Bernstein, Tanja Lange, Christiane Peter...
In our paper titled "Algebraic Signal Processing Theory: Foundation and 1-D Time" appearing in this issue of the IEEE TRANSACTIONS ON SIGNAL PROCESSING, we presented the ...
Clustering is one solution to the demand for wideissue machines and fast clock cycles because it allows for smaller, less ported register files and simpler bypass logic while rema...
In this paper, a method is described to automatically estimate the visible body region of a computed tomography (CT) volume image. In order to quantify the body region, a body coo...
Johannes Feulner, Shaohua Kevin Zhou, Elli Angelop...