103 search results - page 18 / 21 » A Fault Modeling Technique to Test Memory BIST Algorithms |
CODES
2010
IEEE
13 years 3 months ago
2010
IEEE
This paper presents an approach to system-level optimization of error detection implementation in the context of fault-tolerant realtime distributed embedded systems used for safe...
IESS
2009
Springer
13 years 4 months ago
2009
Springer
Abstract. Embedded system design complexities are growing exponentially. Demand has increased for modeling techniques that can provide both accurate measurements of delay and fast ...
ICPADS
2002
IEEE
13 years 12 months ago
2002
IEEE
Wormhole routing is most common in parallel architectures in which messages are sent in small fragments called flits. It is a lightweight and efficient method of routing message...
CGF
1998
13 years 6 months ago
1998
In this paper, we present an e cient algorithm for contact determination between spline models. We make use of a new hierarchy, called ShellTree, that comprises of spherical shell...
ENTCS
2006
13 years 7 months ago
2006
Bounded Model Checking (BMC) searches for counterexamples to a property with a bounded length k. If no such counterexample is found, k is increased. This process terminates when ...