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» A Fault Tolerance Approach for Enterprise Applications
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FPGA
2003
ACM
117views FPGA» more  FPGA 2003»
14 years 23 days ago
Reducing pin and area overhead in fault-tolerant FPGA-based designs
This paper proposes a new high-level technique for designing fault tolerant systems in SRAM-based FPGAs, without modifications in the FPGA architecture. Traditionally, TMR has bee...
Fernanda Lima, Luigi Carro, Ricardo Augusto da Luz...
WOSS
2004
ACM
14 years 1 months ago
Design of self-managing dependable systems with UML and fault tolerance patterns
The development of dependable software systems is a costly undertaking. Fault tolerance techniques as well as self-repair capabilities usually result in additional system complexi...
Matthias Tichy, Daniela Schilling, Holger Giese
VEE
2012
ACM
239views Virtualization» more  VEE 2012»
12 years 3 months ago
Facilitating inter-application interactions for OS-level virtualization
OS-level virtualization generates a minimal start-up and run-time overhead on the host OS and thus suits applications that require both good isolation and high efficiency. However...
Zhiyong Shan, Xin Wang 0001, Tzi-cker Chiueh, Xiao...
FPGA
2000
ACM
141views FPGA» more  FPGA 2000»
13 years 11 months ago
Tolerating operational faults in cluster-based FPGAs
In recent years the application space of reconfigurable devices has grown to include many platforms with a strong need for fault tolerance. While these systems frequently contain ...
Vijay Lakamraju, Russell Tessier
TROB
2008
101views more  TROB 2008»
13 years 7 months ago
Fundamental Limitations on Designing Optimally Fault-Tolerant Redundant Manipulators
Abstract--In this paper, the authors examine the problem of designing nominal manipulator Jacobians that are optimally fault tolerant to one or more joint failures. Optimality is d...
Rodney G. Roberts, Hyun Geun Yu, Anthony A. Maciej...