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DSN
2007
IEEE
14 years 2 months ago
Using Process-Level Redundancy to Exploit Multiple Cores for Transient Fault Tolerance
Transient faults are emerging as a critical concern in the reliability of general-purpose microprocessors. As architectural trends point towards multi-threaded multi-core designs,...
Alex Shye, Tipp Moseley, Vijay Janapa Reddi, Josep...
HPCA
2007
IEEE
14 years 8 months ago
A Low Overhead Fault Tolerant Coherence Protocol for CMP Architectures
It is widely accepted that transient failures will appear more frequently in chips designed in the near future due to several factors such as the increased integration scale. On t...
Ricardo Fernández Pascual, José M. G...
TPDS
2008
134views more  TPDS 2008»
13 years 7 months ago
Extending the TokenCMP Cache Coherence Protocol for Low Overhead Fault Tolerance in CMP Architectures
It is widely accepted that transient failures will appear more frequently in chips designed in the near future due to several factors such as the increased integration scale. On th...
Ricardo Fernández Pascual, José M. G...
DSN
2004
IEEE
13 years 11 months ago
Optimal Object State Transfer - Recovery Policies for Fault Tolerant Distributed Systems
Recent developments in the field of object-based fault tolerance and the advent of the first OMG FTCORBA compliant middleware raise new requirements for the design process of dist...
Panagiotis Katsaros, Constantine Lazos
SRDS
1998
IEEE
13 years 11 months ago
A Metaobject Protocol for Fault-Tolerant CORBA Applications
Abstract: The use of meta-level architectures for the implementation of faulttolerant systems is today very appealing. Nevertheless, all existing fault-tolerant systems based on th...
Marc-Olivier Killijian, Jean-Charles Fabre, Juan-C...