Sciweavers

338 search results - page 13 / 68
» A Field-Programmable Mixed-Analog-Digital Array
Sort
View
TC
1998
13 years 8 months ago
Using Decision Diagrams to Design ULMs for FPGAs
—Many modern Field Programmable Logic Arrays (FPGAs) use lookup table (LUT) logic blocks which can be programmed to realize any function of a fixed number of inputs. It is possib...
Zeljko Zilic, Zvonko G. Vranesic
DATE
2010
IEEE
134views Hardware» more  DATE 2010»
13 years 7 months ago
Combining optimizations in automated low power design
—Starting from sequential programs, we present an approach combining data reuse, multi-level MapReduce, and pipelining to automatically find the most power-efficient designs th...
Qiang Liu, Tim Todman, Wayne Luk
IPPS
2006
IEEE
14 years 2 months ago
Securing embedded programmable gate arrays in secure circuits
The purpose of this article is to propose a survey of possible approaches for implementing embedded reconfigurable gate arrays into secure circuits. A standard secure interfacing ...
Nicolas Valette, Lionel Torres, Gilles Sassatelli,...
EH
2000
IEEE
183views Hardware» more  EH 2000»
14 years 28 days ago
A Reconfigurable Platform for the Automatic Synthesis of Analog Circuits
Reconfigurable chips are integrated circuits whose internal connections can be programmed by the user to attend a specific application. Field Programmable Gate Arrays (FPGAs) and ...
Ricardo Salem Zebulum, Cristina Costa Santini, Hel...
FPGA
2012
ACM
300views FPGA» more  FPGA 2012»
12 years 4 months ago
Reducing the cost of floating-point mantissa alignment and normalization in FPGAs
In floating-point datapaths synthesized on FPGAs, the shifters that perform mantissa alignment and normalization consume a disproportionate number of LUTs. Shifters are implemente...
Yehdhih Ould Mohammed Moctar, Nithin George, Hadi ...