39 search results - page 2 / 8 » A Formal Verification Environment for Railway Signaling Syst... |
HASE
2008
IEEE
13 years 7 months ago
2008
IEEE
Designing safety-critical systems is a complex process, and especially when the design is carried out at different f abstraction where the correctness of the design at one level i...
FDL
2004
IEEE
13 years 10 months ago
2004
IEEE
This paper proposes a formal verification methodology which is smoothly integrated with component-based system-level design, using a divide and conquer approach. The methodology a...
FMCAD
2007
Springer
13 years 11 months ago
2007
Springer
Abstract--Analog and mixed signal (AMS) designs are important integrated circuits that are usually needed at the interface between the electronic system and the real world. Recentl...
DAC
2006
ACM
14 years 1 months ago
2006
ACM
Architectural decisions for DSP modules are often analyzed using high level C models. Such high-level explorations allow early examination of the algorithms and the architectural ...
ASPDAC
2004
ACM
13 years 10 months ago
2004
ACM
The design of complex systems is largely ruled by the time needed for verification. Even though formal methods can provide higher reliability, in practice often simulation based ve...