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» A Formalization of Software Architecture
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SIGSOFT
2003
ACM
14 years 24 days ago
Evaluating and improving the automatic analysis of implicit invocation systems
Model checking and other finite-state analysis techniques have been very successful when used with hardware systems and less successful with software systems. It is especially di...
Jeremy S. Bradbury, Jürgen Dingel
DATE
2006
IEEE
125views Hardware» more  DATE 2006»
14 years 1 months ago
Formal performance analysis and simulation of UML/SysML models for ESL design
UML2 and SysML try to adopt techniques known from software development to systems engineering. However, the focus has been put on modeling aspects until now and quantitative perfo...
Alexander Viehl, Timo Schönwald, Oliver Bring...
VLSID
2003
IEEE
180views VLSI» more  VLSID 2003»
14 years 8 months ago
Automating Formal Modular Verification of Asynchronous Real-Time Embedded Systems
Most verification tools and methodologies such as model checking, equivalence checking, hardware verification, software verification, and hardware-software coverification often fl...
Pao-Ann Hsiung, Shu-Yu Cheng
HCI
2009
13 years 5 months ago
High-Fidelity Prototyping of Interactive Systems Can Be Formal Too
The design of safety critical systems calls for advanced software engineering models, methods and tools in order to meet the safety requirements that will avoid putting human life ...
Philippe A. Palanque, Jean-François Ladry, ...
TSE
2002
94views more  TSE 2002»
13 years 7 months ago
Behavior Protocols for Software Components
In this paper, we propose a means to enhance an architecture description language with a description of component behavior. A notation used for this purpose should be able to expr...
Frantisek Plasil, Stanislav Visnovsky