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ICS
2009
Tsinghua U.
13 years 12 months ago
Exploring pattern-aware routing in generalized fat tree networks
New static source routing algorithms for High Performance Computing (HPC) are presented in this work. The target parallel architectures are based on the commonly used fattree netw...
Germán Rodríguez, Ramón Beivi...
ICCAD
2002
IEEE
94views Hardware» more  ICCAD 2002»
14 years 4 months ago
High-level synthesis of distributed logic-memory architectures
Abstract— With the increasing cost of global communication onchip, high-performance designs for data-intensive applications require architectures that distribute hardware resourc...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
CODES
2006
IEEE
14 years 1 months ago
System-level power-performance trade-offs in bus matrix communication architecture synthesis
System-on-chip communication architectures have a significant impact on the performance and power consumption of modern multiprocessor system-on-chips (MPSoCs). However, customiza...
Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi,...
ICDE
2009
IEEE
223views Database» more  ICDE 2009»
14 years 9 months ago
Another Outlier Bites the Dust: Computing Meaningful Aggregates in Sensor Networks
Abstract-- Recent work has demonstrated that readings provided by commodity sensor nodes are often of poor quality. In order to provide a valuable sensory infrastructure for monito...
Antonios Deligiannakis, Yannis Kotidis, Vasilis Va...
HPDC
2007
IEEE
14 years 1 months ago
IDEA: : an infrastructure for detection-based adaptive consistency control in replicated services
In Internet-scale distributed systems, replicationbased scheme has been widely deployed to increase the availability and efficiency of services. Hence, consistency maintenance amo...
Yijun Lu, Ying Lu, Hong Jiang