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IEEEPACT
2002
IEEE
14 years 12 days ago
Compiler-Controlled Caching in Superword Register Files for Multimedia Extension Architectures
In this paper, we describe an algorithm and implementation of locality optimizations for architectures with instruction sets such as Intel’s SSE and Motorola’s AltiVec that su...
Jaewook Shin, Jacqueline Chame, Mary W. Hall
EUC
2006
Springer
13 years 11 months ago
Custom Instruction Generation Using Temporal Partitioning Techniques for a Reconfigurable Functional Unit
Extracting appropriate custom instructions is an important phase for implementing an application on an extensible processor with a reconfigurable functional unit (RFU). Custom inst...
Farhad Mehdipour, Hamid Noori, Morteza Saheb Zaman...
ISCA
2000
IEEE
156views Hardware» more  ISCA 2000»
13 years 12 months ago
CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit
Reconfigurable hardware has the potential for significant performance improvements by providing support for application−specific operations. We report our experience with Chimae...
Zhi Alex Ye, Andreas Moshovos, Scott Hauck, Prithv...
CODES
1999
IEEE
13 years 11 months ago
A flexible code generation framework for the design of application specific programmable processors
This paper introduces a flexible code generation framework dedicated to the design of application specific programmable processors. This tool allows the user to build specific com...
François Charot, Vincent Messé
ISSE
2008
13 years 7 months ago
Automatic framework generation for hard real-time applications
The communication and tasking infrastructure of a real-time application makes up a significant portion of any modern embedded control system. Traditionally, the tasking and communi...
Irfan Hamid, Bechir Zalila, Elie Najm, Jér&...