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VLSID
2000
IEEE
94views VLSI» more  VLSID 2000»
13 years 12 months ago
A Genetic Algorithm for the Synthesis of Structured Data Paths
The technique presented here achieves simultaneous optimization of schedule time and data path component cost within a structured data path architecture, using a genetic algorithm...
Chittaranjan A. Mandal, R. M. Zimmer
VLSID
1996
IEEE
133views VLSI» more  VLSID 1996»
13 years 11 months ago
Allocation and Binding in Data Path Synthesis Using a Genetic Algorithm Approach
A technique for allocatzon and binding for data path synthesis (DPS) using a Genetic Algorithm (GA) approach has been developed. The proposed genetic algorithm uses a non-conventi...
Chittaranjan A. Mandal, P. P. Chakrabarti, Sujoy G...
ICCAD
1995
IEEE
135views Hardware» more  ICCAD 1995»
13 years 11 months ago
An iterative improvement algorithm for low power data path synthesis
We address the problem of minimizing power consumption in behavioral synthesis of data-dominated circuits. The complex nature of power as a cost function implies that the effects ...
Anand Raghunathan, Niraj K. Jha
ICCAD
2001
IEEE
201views Hardware» more  ICCAD 2001»
14 years 4 months ago
An Integrated Data Path Optimization for Low Power Based on Network Flow Method
Abstract: We propose an effective algorithm for power optimization in behavioral synthesis. In previous work, it has been shown that several hardware allocation/binding problems fo...
Chun-Gi Lyuh, Taewhan Kim, Chien-Liang Liu
GECCO
2007
Springer
268views Optimization» more  GECCO 2007»
14 years 1 months ago
Synthesis of analog filters on an evolvable hardware platform using a genetic algorithm
This work presents a novel approach to filter synthesis on a field programmable analog array (FPAA) architecture using a genetic algorithm (GA). First, a Matlab model of the FPA...
Joachim Becker, Stanis Trendelenburg, Fabian Henri...