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» A Genetic Testing Framework for Digital Integrated Circuits
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FPL
2001
Springer
96views Hardware» more  FPL 2001»
14 years 2 months ago
System Level Tools for DSP in FPGAs
Abstract. Visual data ow environments are ideally suited for modeling digital signal processing (DSP) systems, as many DSP algorithms are most naturally speci ed by signal ow gra...
James Hwang, Brent Milne, Nabeel Shirazi, Jeffrey ...
DATE
2007
IEEE
80views Hardware» more  DATE 2007»
14 years 4 months ago
Engineering trust with semantic guardians
The ability to guarantee the functional correctness of digital integrated circuits and, in particular, complex microprocessors, is a key task in the production of secure and trust...
Ilya Wagner, Valeria Bertacco
ASPDAC
2006
ACM
137views Hardware» more  ASPDAC 2006»
14 years 3 months ago
Parameterized block-based non-gaussian statistical gate timing analysis
As technology scales down, timing verification of digital integrated circuits becomes an increasingly challenging task due to the gate and wire variability. Therefore, statistical...
Soroush Abbaspour, Hanif Fatemi, Massoud Pedram
GECCO
2009
Springer
130views Optimization» more  GECCO 2009»
14 years 4 months ago
Liposome logic
VLSI research, in its continuous push toward further miniaturisation, is seeking to break through the limitations of current circuit manufacture techniques by moving towards biomi...
James Smaldon, Natalio Krasnogor, Alexander Camero...
CHES
2005
Springer
109views Cryptology» more  CHES 2005»
14 years 3 months ago
Security Evaluation Against Electromagnetic Analysis at Design Time
Electromagnetic analysis (EMA) can be used to compromise secret information by analysing the electric and/or magnetic fields emanating from a device. It follows differential power...
Huiyun Li, A. Theodore Markettos, Simon W. Moore