Sciweavers

427 search results - page 13 / 86
» A Graph Based Synthesis Algorithm for Solving CSPs
Sort
View
AICCSA
2007
IEEE
84views Hardware» more  AICCSA 2007»
14 years 2 months ago
Encoding Algorithms for Logic Synthesis
This paper presents an encoding algorithm that is very efficient for many different logic synthesis problems. The algorithm is based on the use of special tables and includes two ...
Valery Sklyarov, Iouliia Skliarova
DATE
2003
IEEE
102views Hardware» more  DATE 2003»
14 years 29 days ago
Power Constrained High-Level Synthesis of Battery Powered Digital Systems
We present a high-level synthesis algorithm solving the combined scheduling, allocation and binding problem minimizing area under both latency and maximum power per clock-cycle co...
S. F. Nielsen, Jan Madsen
ISCAS
2003
IEEE
96views Hardware» more  ISCAS 2003»
14 years 28 days ago
A novel improvement technique for high-level test synthesis
Improving testability during the early stages of High-Level Synthesis (HLS) has several benefits, including reduced test hardware overhead, reduced test costs, reduced design iter...
Saeed Safari, Hadi Esmaeilzadeh, Amir-Hossein Jaha...
ALGORITHMICA
2006
132views more  ALGORITHMICA 2006»
13 years 7 months ago
Straight-Line Drawing Algorithms for Hierarchical Graphs and Clustered Graphs
Hierarchical graphs and clustered graphs are useful non-classical graph models for structured relational information. Hierarchical graphs are graphs with layering structures; clus...
Peter Eades, Qing-Wen Feng, Xuemin Lin, Hiroshi Na...
DAC
1995
ACM
13 years 11 months ago
Register Allocation and Binding for Low Power
This paper describes a technique for calculating the switching activity of a set of registers shared by di erent data values. Based on the assumption that the joint pdf (probabili...
Jui-Ming Chang, Massoud Pedram