136 search results - page 12 / 28 » A Graph Reduction Approach to Symbolic Circuit Analysis |
CAV
2006
Springer
13 years 11 months ago
2006
Springer
We present an approach for applying symmetry reduction techniques to probabilistic model checking, a formal verification method for the quantitative analysis of systems with stocha...
IFM
2009
Springer
14 years 2 months ago
2009
Springer
We present the new technique of dynamic path reduction (DPR), which allows one to prune redundant paths from the state space of a program under verification. DPR is a very general...
VTS
2006
IEEE
14 years 1 months ago
2006
IEEE
A new algorithm for identifying stuck faults in combinational circuits that cannot be detected by a given input sequence is presented. Other than pre and post-processing steps, ce...
SPIN
2000
Springer
13 years 11 months ago
2000
Springer
Abstract. Simultaneous reachability analysis SRA is a recently proposed approach to alleviating the state space explosion problem in reachability analysis of concurrent systems. Th...
DAC
1994
ACM
13 years 11 months ago
1994
ACM
Regarding nite state machines as Markov chains facilitates the application of probabilistic methods to very large logic synthesis and formal veri cation problems. Recently, we ha...